^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * PIP Ethernet nexus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) The PIP Ethernet nexus can control several data packet input/output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) devices. The devices have a two level grouping scheme. There may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) several interfaces, and each interface may have several ports. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ports might be an individual Ethernet PHY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Properties for the PIP nexus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible: "cavium,octeon-3860-pip"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - reg: The base address of the PIP's register bank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #address-cells: Must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - #size-cells: Must be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Properties for PIP interfaces which is a child the PIP nexus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - compatible: "cavium,octeon-3860-pip-interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - reg: The interface number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - #address-cells: Must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - #size-cells: Must be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Properties for PIP port which is a child the PIP interface:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - compatible: "cavium,octeon-3860-pip-port"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - reg: The port number within the interface group.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - phy-handle: Optional, see ethernet.txt file in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Value range is 1-31, and mapping to the actual delay varies depending on HW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) Value range is 1-31, and mapping to the actual delay varies depending on HW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pip@11800a0000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) compatible = "cavium,octeon-3860-pip";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reg = <0x11800 0xa0000000 0x0 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) interface@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) compatible = "cavium,octeon-3860-pip-interface";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reg = <0>; /* interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ethernet@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) compatible = "cavium,octeon-3860-pip-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) reg = <0x0>; /* Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) local-mac-address = [ 00 0f b7 10 63 60 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) phy-handle = <&phy2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ethernet@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) compatible = "cavium,octeon-3860-pip-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) reg = <0x1>; /* Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) local-mac-address = [ 00 0f b7 10 63 61 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) phy-handle = <&phy3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ethernet@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) compatible = "cavium,octeon-3860-pip-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) reg = <0x2>; /* Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) local-mac-address = [ 00 0f b7 10 63 62 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) phy-handle = <&phy4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ethernet@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) compatible = "cavium,octeon-3860-pip-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) reg = <0x3>; /* Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) local-mac-address = [ 00 0f b7 10 63 63 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) phy-handle = <&phy5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) interface@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) compatible = "cavium,octeon-3860-pip-interface";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reg = <1>; /* interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ethernet@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) compatible = "cavium,octeon-3860-pip-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) reg = <0x0>; /* Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) local-mac-address = [ 00 0f b7 10 63 64 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) phy-handle = <&phy6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };