Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/net/calxeda-xgmac.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Calxeda Highbank 10Gb XGMAC Ethernet controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   The Calxeda XGMAC Ethernet controllers are directly connected to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   internal machine "network fabric", which is set up, initialised and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   managed by the firmware. So there are no PHY properties in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   binding. Switches in the fabric take care of routing and mapping the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   traffic to external network ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   - Andre Przywara <andre.przywara@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)     const: calxeda,hb-xgmac
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)     description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)       Can point to at most 3 xgmac interrupts. The 1st one is the main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)       interrupt, the 2nd one is used for power management. The optional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)       3rd one is the low power state interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)     minItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)     maxItems: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)   dma-coherent: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)     ethernet@fff50000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)         compatible = "calxeda,hb-xgmac";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)         reg = <0xfff50000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)         interrupts = <0 77 4>, <0 78 4>, <0 79 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)     };