^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) APM X-Gene SoC Ethernet nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Ethernet nodes are defined to describe on-chip ethernet interfaces in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) APM X-Gene SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties for all the ethernet interfaces:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible: Should state binding information from the following list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - "apm,xgene-enet": RGMII based 1G interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - "apm,xgene1-sgenet": SGMII based 1G interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - "apm,xgene1-xgenet": XFI based 10G interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reg: Address and length of the register set for the device. It contains the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) information of registers in the same order as described by reg-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - reg-names: Should contain the register set names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - "enet_csr": Ethernet control and status register address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - "ring_csr": Descriptor ring control and status register address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - "ring_cmd": Descriptor ring command register address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - interrupts: Two interrupt specifiers can be specified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - First is the Rx interrupt. This irq is mandatory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - Second is the Tx completion interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) This is supported only on SGMII based 1GbE and 10GbE interfaces.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - channel: Ethernet to CPU, start channel (prefetch buffer) number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - Must map to the first irq and irqs must be sequential
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - port-id: Port number (0 or 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - clocks: Reference to the clock entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - local-mac-address: MAC address assigned to this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - phy-connection-type: Interface type between ethernet device and PHY device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Required properties for ethernet interfaces that have external PHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - phy-handle: Reference to a PHY node connected to this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - mdio: Device tree subnode with the following required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - compatible: Must be "apm,xgene-mdio".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - #address-cells: Must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - #size-cells: Must be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) For the phy on the mdio bus, there must be a node with the following fields:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - compatible: PHY identifier. Please refer ./phy.txt for the format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - reg: The ID number for the phy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - status: Should be "ok" or "disabled" for enabled/disabled. Default is "ok".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - tx-delay: Delay value for RGMII bridge TX clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Valid values are between 0 to 7, that maps to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 417, 717, 1020, 1321, 1611, 1913, 2215, 2514 ps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Default value is 4, which corresponds to 1611 ps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - rx-delay: Delay value for RGMII bridge RX clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Valid values are between 0 to 7, that maps to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 273, 589, 899, 1222, 1480, 1806, 2147, 2464 ps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Default value is 2, which corresponds to 899 ps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - rxlos-gpios: Input gpio from SFP+ module to indicate availability of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) incoming signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) menetclk: menetclk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) compatible = "apm,xgene-device-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) clock-output-names = "menetclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) status = "ok";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) menet: ethernet@17020000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) compatible = "apm,xgene-enet";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) status = "disabled";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) reg = <0x0 0x17020000 0x0 0xd100>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) <0x0 0x17030000 0x0 0x400>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) <0x0 0x10000000 0x0 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) reg-names = "enet_csr", "ring_csr", "ring_cmd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) interrupts = <0x0 0x3c 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) port-id = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) clocks = <&menetclk 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) local-mac-address = [00 01 73 00 00 01];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) phy-connection-type = "rgmii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) phy-handle = <&menetphy>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) mdio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) compatible = "apm,xgene-mdio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) menetphy: menetphy@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) compatible = "ethernet-phy-id001c.c915";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) reg = <0x3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* Board-specific peripheral configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) &menet {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tx-delay = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) rx-delay = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) status = "ok";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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