Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Andestech L2 cache Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The level-2 cache controller plays an important role in reducing memory latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) for high performance systems, such as thoese designs with AndesCore processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Level-2 cache controller in general enhances overall system performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) signigicantly and the system power consumption might be reduced as well by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) reducing DRAM accesses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) This binding specifies what properties must be available in the device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) representation of an Andestech L2 cache controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	- compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		Value type: <string>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		Definition: "andestech,atl2c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	- reg : Physical base address and size of cache controller's memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	- cache-unified : Specifies the cache is a unified cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	- cache-level : Should be set to 2 for a level 2 cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	cache-controller@e0500000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		compatible = "andestech,atl2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		reg = <0xe0500000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		cache-unified;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		cache-level = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	};