^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Common multiplexer controller bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ======================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) A multiplexer (or mux) controller will have one, or several, consumer devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) that uses the mux controller. Thus, a mux controller can possibly control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) several parallel multiplexers. Presumably there will be at least one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) multiplexer needed by each consumer, but a single mux controller can of course
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) control several multiplexers for a single consumer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) A mux controller provides a number of states to its consumers, and the state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 0-7 for an 8-way multiplexer, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Consumers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Mux controller consumers should specify a list of mux controllers that they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) want to use with a property containing a 'mux-ctrl-list':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) mux-ctrl-phandle : phandle to mux controller node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) mux-ctrl-specifier : array of #mux-control-cells specifying the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) given mux controller (controller specific)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Mux controller properties should be named "mux-controls". The exact meaning of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) each mux controller property must be documented in the device tree binding for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) each consumer. An optional property "mux-control-names" may contain a list of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) strings to label each of the mux controllers listed in the "mux-controls"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Drivers for devices that use more than a single mux controller can use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "mux-control-names" property to map the name of the requested mux controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) to an index into the list given by the "mux-controls" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mux-ctrl-specifier typically encodes the chip-relative mux controller number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) If the mux controller chip only provides a single mux controller, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) mux-ctrl-specifier can typically be left out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* One consumer of a 2-way mux controller (one GPIO-line) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mux: mux-controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) compatible = "gpio-mux";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #mux-control-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) adc-mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) compatible = "io-channel-mux";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) io-channels = <&adc 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) io-channel-names = "parent";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mux-controls = <&mux>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) mux-control-names = "adc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) channels = "sync", "in";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) Note that in the example above, specifying the "mux-control-names" is redundant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) because there is only one mux controller in the list. However, if the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) for the consumer node in fact asks for a named mux controller, that name is of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) course still required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Two consumers (one for an ADC line and one for an i2c bus) of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * parallel 4-way multiplexers controlled by the same two GPIO-lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) mux: mux-controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) compatible = "gpio-mux";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #mux-control-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) <&pioA 1 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) adc-mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) compatible = "io-channel-mux";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) io-channels = <&adc 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) io-channel-names = "parent";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) mux-controls = <&mux>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) channels = "sync-1", "in", "out", "sync-2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) i2c-mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) compatible = "i2c-mux";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) i2c-parent = <&i2c1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) mux-controls = <&mux>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) i2c@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ssd1307: oled@3c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) i2c@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) pca9555: pca9555@20 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Mux controller nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) Mux controller nodes must specify the number of cells used for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) specifier using the '#mux-control-cells' property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) Optionally, mux controller nodes can also specify the state the mux should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) have when it is idle. The idle-state property is used for this. If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) idle-state is not present, the mux controller is typically left as is when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) it is idle. For multiplexer chips that expose several mux controllers, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) idle-state property is an array with one idle state for each mux controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) The special value (-1) may be used to indicate that the mux should be left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) as is when it is idle. This is the default, but can still be useful for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) mux controller chips with more than one mux controller, particularly when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) there is a need to "step past" a mux controller and set some other idle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) state for a mux controller with a higher index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) Some mux controllers have the ability to disconnect the input/output of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) multiplexer. Using this disconnected high-impedance state as the idle state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) is indicated with idle state (-2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) These constants are available in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #include <dt-bindings/mux/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) as MUX_IDLE_AS_IS (-1) and MUX_IDLE_DISCONNECT (-2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) An example mux controller node look like this (the adg972a chip is a triple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 4-way multiplexer):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) mux: mux-controller@50 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) compatible = "adi,adg792a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) reg = <0x50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #mux-control-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) idle-state = <MUX_IDLE_DISCONNECT MUX_IDLE_AS_IS 2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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