Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Sigma Designs Tango4 NAND Flash Controller (NFC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible: "sigma,smp8758-nand"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg: address/size of nfc_reg, nfc_mem, and pbus_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - dmas: reference to the DMA channel used by the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - dma-names: "rxtx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - clocks: reference to the system clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #address-cells: <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #size-cells: <0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Children nodes represent the available NAND chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	nandc: nand-controller@2c000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		compatible = "sigma,smp8758-nand";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		dmas = <&dma0 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		dma-names = "rxtx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		clocks = <&clkgen SYS_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		nand@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			reg = <0>; /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			nand-ecc-strength = <14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 			nand-ecc-step-size = <1024>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		nand@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			reg = <1>; /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			nand-ecc-strength = <14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			nand-ecc-step-size = <1024>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	};