^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Flash chips (Memory Technology Devices) are often used for solid state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) file systems on embedded devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - compatible : should contain the specific model of mtd chip(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) used, if known, followed by either "cfi-flash", "jedec-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "mtd-ram" or "mtd-rom".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg : Address range(s) of the mtd chip(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) It's possible to (optionally) define multiple "reg" tuples so that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) non-identical chips can be described in one node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - bank-width : Width (in bytes) of the bank. Equal to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) device width times the number of interleaved chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - device-width : (optional) Width of a single mtd chip. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) omitted, assumed to be equal to 'bank-width'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #address-cells, #size-cells : Must be present if the device has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) sub-nodes representing partitions (see below). In this case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) both #address-cells and #size-cells must be equal to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - no-unaligned-direct-access: boolean to disable the default direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mapping of the flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) problems with JFFS2 usage, as the local bus (LPB) doesn't support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unaligned accesses as implemented in the JFFS2 code via memcpy().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) By defining "no-unaligned-direct-access", the flash will not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) exposed directly to the MTD users (e.g. JFFS2) any more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - linux,mtd-name: allow to specify the mtd name for retro capability with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) physmap-flash drivers as boot loader pass the mtd partition via the old
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) device name physmap-flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - use-advanced-sector-protection: boolean to enable support for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) advanced sector protection (Spansion: PPB - Persistent Protection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Bits) locking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - addr-gpios : (optional) List of GPIO descriptors that will be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) address the MSBs address lines. The order goes from LSB to MSB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) For JEDEC compatible devices, the following additional properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) are defined:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - vendor-id : Contains the flash chip's vendor id (1 byte).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - device-id : Contains the flash chip's device id (1 byte).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) For ROM compatible devices (and ROM fallback from cfi-flash), the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) additional (optional) property is defined:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - erase-size : The chip's physical erase block size in bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) The device tree may optionally contain endianness property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) little-endian or big-endian : It Represents the endianness that should be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) by the controller to properly read/write data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) from/to the flash. If this property is missing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) the endianness is chosen by the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) (potentially based on extra configuration options).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) The device tree may optionally contain sub-nodes describing partitions of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) address space. See partition.txt for more detail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) flash@ff000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) compatible = "amd,am29lv128ml", "cfi-flash";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) reg = <ff000000 01000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) bank-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) device-width = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) fs@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) label = "fs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) reg = <0 f80000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) firmware@f80000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) label ="firmware";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) reg = <f80000 80000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) read-only;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Here an example with multiple "reg" tuples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) flash@f0000000,0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) compatible = "intel,PC48F4400P0VB", "cfi-flash";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) reg = <0 0x00000000 0x02000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 0 0x02000000 0x02000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) bank-width = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) partition@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) label = "test-part1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) reg = <0 0x04000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) An example using SRAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) sram@2,0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) compatible = "samsung,k6f1616u6a", "mtd-ram";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) reg = <2 0 0x00200000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) bank-width = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) An example using gpio-addrs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) flash@20000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) compatible = "cfi-flash", "jedec-flash";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) reg = <0x20000000 0x02000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ranges = <0 0x00000000 0x02000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 1 0x02000000 0x02000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) bank-width = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) partition@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) label = "test-part1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) reg = <0 0x04000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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