Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Hisilicon Hip04 Soc NAND controller DT binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible:          Should be "hisilicon,504-nfc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg:                 The first contains base physical address and size of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)                        NAND controller's registers. The second contains base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)                        physical address and size of NAND controller's buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - interrupts:          Interrupt number for nfc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - nand-bus-width:      See nand-controller.yaml.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - nand-ecc-mode:       Support none and hw ecc mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - #address-cells:      Partition address, should be set 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #size-cells:         Partition size, should be set 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - nand-ecc-strength:   Number of bits to correct per ECC step.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - nand-ecc-step-size:  Number of data bytes covered by a single ECC step.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) The following ECC strength and step size are currently supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Flash chip may optionally contain additional sub-nodes describing partitions of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) the address space. See partition.txt for more detail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	nand: nand@4020000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		compatible = "hisilicon,504-nfc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		interrupts = <0 379 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		nand-bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		nand-ecc-mode = "hw";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		nand-ecc-strength = <16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		nand-ecc-step-size = <1024>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		#size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		partition@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			label = "nand_text";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			reg = <0x00000000 0x00400000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	};