Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Synopsys Designware Mobile Storage Host Controller Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - $ref: "synopsys-dw-mshc-common.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - Ulf Hansson <ulf.hansson@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) # Everything else is described in the common file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)     const: snps,dw-mshc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)     minItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)       Handle to "biu" and "ciu" clocks for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)       bus interface unit clock and the card interface unit clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)       - const: biu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)       - const: ciu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)   - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)     mmc@12200000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)       compatible = "snps,dw-mshc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)       reg = <0x12200000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)       interrupts = <0 75 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)       clocks = <&clock 351>, <&clock 132>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)       clock-names = "biu", "ciu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)       dmas = <&pdma 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)       dma-names = "rx-tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)       resets = <&rst 20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)       reset-names = "reset";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)       vmmc-supply = <&buck8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)       #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)       #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)       broken-cd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)       bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)       cap-mmc-highspeed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)       cap-sd-highspeed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)       card-detect-delay = <200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)       max-frequency = <200000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)       clock-frequency = <400000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)       data-addr = <0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)       fifo-depth = <0x80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)       fifo-watermark-aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)     };