Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Synopsys DesignWare Cores Mobile Storage Host Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: should be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)     "snps,dwcmshc-sdhci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg: offset and length of the register set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - interrupts: a single interrupt specifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clocks: Array of clocks required for SDHCI; requires at least one for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)     core clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clock-names: Array of names corresponding to clocks property; shall be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)     "core" for core clock and "bus" for optional bus clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	sdhci2: sdhci@aa0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		compatible = "snps,dwcmshc-sdhci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		reg = <0xaa0000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		clocks = <&emmcclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	}