Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Fujitsu SDHCI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This file documents differences between the core properties in mmc.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) and the properties used by the sdhci_f_sdh30 driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - compatible: "fujitsu,mb86s70-sdhci-3.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clocks: Must contain an entry for each entry in clock-names. It is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   list of phandles and clock-specifier pairs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   See ../clocks/clock-bindings.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clock-names: Should contain the following two entries:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	"iface" - clock used for sdhci interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	"core"  - core clock for sdhci controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - vqmmc-supply: phandle to the regulator device tree node, mentioned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   as the VCCQ/VDD_IO supply in the eMMC/SD specs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - fujitsu,cmd-dat-delay-select: boolean property indicating that this host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   requires the CMD_DAT_DELAY control to be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	sdhci1: mmc@36600000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		compatible = "fujitsu,mb86s70-sdhci-3.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		reg = <0 0x36600000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		interrupts = <0 172 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 			     <0 173 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		bus-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		vqmmc-supply = <&vccq_sdhci1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		clocks = <&clock 2 2 0>, <&clock 2 3 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		clock-names = "iface", "core";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	};