^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Simple MMC power sequence provider binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Ulf Hansson <ulf.hansson@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) The purpose of the simple MMC power sequence provider is to supports a set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) of common properties between various SOC designs. It thus enables us to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) the same provider for several SOC designs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) const: mmc-pwrseq-simple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) reset-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) # Put some limit to avoid false warnings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) maxItems: 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) contains a list of GPIO specifiers. The reset GPIOs are asserted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) at initialization and prior we start the power up procedure of the card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) They will be de-asserted right after the power has been provided to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) description: Handle for the entry in clock-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - const: ext_clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) description: External clock provided to the card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) post-power-on-delay-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Delay in ms after powering the card and de-asserting the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) reset-gpios (if any).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) power-off-delay-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Delay in us after asserting the reset-gpios (if any)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) during power off of the card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <dt-bindings/gpio/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sdhci0_pwrseq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) compatible = "mmc-pwrseq-simple";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clocks = <&clk_32768_ck>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) clock-names = "ext_clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ...