Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-emmc.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Simple eMMC hardware reset provider binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Ulf Hansson <ulf.hansson@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   The purpose of this driver is to perform standard eMMC hw reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   procedure, as described by Jedec 4.4 specification. This procedure is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   performed just after MMC core enabled power to the given mmc host (to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   fix possible issues if bootloader has left eMMC card in initialized or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   unknown state), and before performing complete system reboot (also in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   case of emergency reboot call). The latter is needed on boards, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   doesn't have hardware reset logic connected to emmc card and (limited or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   broken) ROM bootloaders are unable to read second stage from the emmc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   card if the card is left in unknown or already initialized state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)     const: mmc-pwrseq-emmc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   reset-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)       contains a GPIO specifier. The reset GPIO is asserted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)       and then deasserted to perform eMMC card reset. To perform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)       reset procedure as described in Jedec 4.4 specification, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)       gpio line should be defined as GPIO_ACTIVE_LOW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   - reset-gpios
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)     #include <dt-bindings/gpio/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)     sdhci0_pwrseq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)       compatible = "mmc-pwrseq-emmc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)       reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ...