Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) title: MMC Controller Generic Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)   - Ulf Hansson <ulf.hansson@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)   These properties are common to multiple MMC host controllers. Any host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)   that requires the respective functionality should implement them using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)   these definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)   It is possible to assign a fixed index mmcN to an MMC host controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)   (and the corresponding mmcblkN devices) by defining an alias in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)   /aliases device tree node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)   $nodename:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)     pattern: "^mmc(@.*)?$"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)   "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)     const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)     description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)       The cell is the slot ID if a function subnode is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)   "#size-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)     const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)   # Card Detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)   # If none of these properties are supplied, the host native card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)   # detect will be used. Only one of them should be provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)   broken-cd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)       There is no card detection available; polling must be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)   cd-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)       The card detection will be done using the GPIO provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)   non-removable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)       Non-removable slot (like eMMC); assume always present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)   # *NOTE* on CD and WP polarity. To use common for all SD/MMC host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)   # controllers line polarity properties, we have to fix the meaning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)   # of the "normal" and "inverted" line levels. We choose to follow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)   # the SDHCI standard, which specifies both those lines as "active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)   # low." Therefore, using the "cd-inverted" property means, that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)   # CD line is active high, i.e. it is high, when a card is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)   # inserted. Similar logic applies to the "wp-inverted" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)   #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)   # CD and WP lines can be implemented on the hardware in one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)   # ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)   # as dedicated pins. Polarity of dedicated pins can be specified,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)   # using *-inverted properties. GPIO polarity can also be specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)   # using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)   # latter case. We choose to use the XOR logic for GPIO CD and WP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)   # lines.  This means, the two properties are "superimposed," for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)   # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)   # respective *-inverted property property results in a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)   # double-inversion and actually means the "normal" line polarity is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)   # in effect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)   wp-inverted:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)       The Write Protect line polarity is inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)   cd-inverted:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)       The CD line polarity is inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)   # Other properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)   bus-width:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)       Number of data lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)     enum: [1, 4, 8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)     default: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)   max-frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)       Maximum operating frequency of the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)     minimum: 400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)     maximum: 200000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)   disable-wp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)       When set, no physical write-protect line is present. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)       property should only be specified when the controller has a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)       dedicated write-protect detection logic. If a GPIO is always used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)       for the write-protect detection logic, it is sufficient to not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)       specify the wp-gpios property in the absence of a write-protect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)       line. Not used in combination with eMMC or SDIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)   wp-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)       GPIO to use for the write-protect detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)   cd-debounce-delay-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)       Set delay time before detecting card after card insert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)       interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)   no-1-8-v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)       When specified, denotes that 1.8V card voltage is not supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)       on this system, even if the controller claims it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)   cap-sd-highspeed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)       SD high-speed timing is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)   cap-mmc-highspeed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)       MMC high-speed timing is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)   sd-uhs-sdr12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)       SD UHS SDR12 speed is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)   sd-uhs-sdr25:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)       SD UHS SDR25 speed is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)   sd-uhs-sdr50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)       SD UHS SDR50 speed is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)   sd-uhs-sdr104:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)       SD UHS SDR104 speed is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)   sd-uhs-ddr50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)       SD UHS DDR50 speed is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)   cap-power-off-card:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)       Powering off the card is safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)   cap-mmc-hw-reset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)       eMMC hardware reset is supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)   cap-sdio-irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)       enable SDIO IRQ signalling on this interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)   full-pwr-cycle:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)       Full power cycle of the card is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)   full-pwr-cycle-in-suspend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)       Full power cycle of the card in suspend is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)   mmc-ddr-1_2v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)       eMMC high-speed DDR mode (1.2V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)   mmc-ddr-1_8v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)       eMMC high-speed DDR mode (1.8V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)   mmc-ddr-3_3v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)       eMMC high-speed DDR mode (3.3V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)   mmc-hs200-1_2v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)       eMMC HS200 mode (1.2V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)   mmc-hs200-1_8v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)       eMMC HS200 mode (1.8V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)   mmc-hs400-1_2v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)       eMMC HS400 mode (1.2V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)   mmc-hs400-1_8v:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)       eMMC HS400 mode (1.8V I/O) is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)   mmc-hs400-enhanced-strobe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)       eMMC HS400 enhanced strobe mode is supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)   dsr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)       Value the card Driver Stage Register (DSR) should be programmed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)       with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)     minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)     maximum: 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)   no-sdio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)       Controller is limited to send SDIO commands during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)       initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)   no-sd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)       Controller is limited to send SD commands during initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)   no-mmc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)       Controller is limited to send MMC commands during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)       initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)   fixed-emmc-driver-type:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)       For non-removable eMMC, enforce this driver type. The value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)       the driver type as specified in the eMMC specification (table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)       206 in spec version 5.1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)     minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)     maximum: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)   post-power-on-delay-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)       It was invented for MMC pwrseq-simple which could be referred to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)       mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)       waiting for I/O signalling and card power supply to be stable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)       regardless of whether pwrseq-simple is used. Default to 10ms if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)       no available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)     default: 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)   supports-cqe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)       The presence of this property indicates that the corresponding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)       MMC host controller supports HW command queue feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)   disable-cqe-dcmd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)       The presence of this property indicates that the MMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)       controller\'s command queue engine (CQE) does not support direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)       commands (DCMDs).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)   keep-power-in-suspend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)       SDIO only. Preserves card power during a suspend/resume cycle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)   # Deprecated: enable-sdio-wakeup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)   wakeup-source:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)       SDIO only. Enables wake up of host system on SDIO IRQ assertion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)   vmmc-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)       Supply for the card power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)   vqmmc-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)       Supply for the bus IO line power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)   mmc-pwrseq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)     $ref: /schemas/types.yaml#/definitions/phandle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)       System-on-Chip designs may specify a specific MMC power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)       sequence. To successfully detect an (e)MMC/SD/SDIO card, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)       power sequence must be maintained while initializing the card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)   "^.*@[0-9]+$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)     type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)     description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)       On embedded systems the cards connected to a host may need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)       additional properties. These can be specified in subnodes to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)       host controller node. The subnodes are identified by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)       standard \'reg\' property. Which information exactly can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)       specified depends on the bindings for the SDIO function driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)       for the subnode, as specified by the compatible string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)     properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)       compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)         description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)           Name of SDIO function following generic names recommended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)           practice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)       reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)         items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)           - minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)             maximum: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)             description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)               Must contain the SDIO function number of the function this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)               subnode describes. A value of 0 denotes the memory SD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)               function, values from 1 to 7 denote the SDIO functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)       broken-hpi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)         $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)           Use this to indicate that the mmc-card has a broken hpi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)           implementation, and that hpi should not be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)     required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)       - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)   "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)     $ref: /schemas/types.yaml#/definitions/uint32-array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)     minItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)       minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)       maximum: 359
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)       description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)         Set the clock (phase) delays which are to be configured in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)         controller while switching to particular speed mode. These values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)         are in pair of degrees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) dependencies:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)   cd-debounce-delay-ms: [ cd-gpios ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)   fixed-emmc-driver-type: [ non-removable ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) additionalProperties: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)     mmc@ab000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)         compatible = "sdhci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)         reg = <0xab000000 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)         interrupts = <23>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)         bus-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)         cd-gpios = <&gpio 69 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)         cd-inverted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)         wp-gpios = <&gpio 70 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)         max-frequency = <50000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)         keep-power-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)         wakeup-source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)         mmc-pwrseq = <&sdhci0_pwrseq>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)         clk-phase-sd-hs = <63>, <72>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)     mmc3: mmc@1c12000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)         #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)         #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)         reg = <0x1c12000 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)         pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)         pinctrl-0 = <&mmc3_pins_a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)         vmmc-supply = <&reg_vmmc3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)         bus-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)         non-removable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)         mmc-pwrseq = <&sdhci0_pwrseq>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)         brcmf: bcrmf@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)             reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)             compatible = "brcm,bcm43xx-fmac";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)             interrupt-parent = <&pio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)             interrupts = <10 8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)             interrupt-names = "host-wake";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)         };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)     };