Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Atmel SSC driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	- atmel,at91rm9200-ssc: support pdc transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	- atmel,at91sam9g45-ssc: support dma transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg: Should contain SSC registers location and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts: Should contain SSC interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - clock-names: tuple listing input clock names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	Required elements: "pclk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clocks: phandles to input clocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Required properties for devices compatible with "atmel,at91sam9g45-ssc":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - dmas: DMA specifier, consisting of a phandle to DMA controller node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   the memory interface and SSC DMA channel ID (for tx and rx).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - dma-names: Must be "tx", "rx".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   - atmel,clk-from-rk-pin: bool property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)      - When SSC works in slave mode, according to the hardware design, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)        clock can get from TK pin, and also can get from RK pin. So, add
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)        this parameter to choose where the clock from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)      - By default the clock is from TK pin, if the clock from RK pin, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)        property is needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   - #sound-dai-cells: Should contain <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)      - This property makes the SSC into an automatically registered DAI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - PDC transfer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ssc0: ssc@fffbc000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	compatible = "atmel,at91rm9200-ssc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	reg = <0xfffbc000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	interrupts = <14 4 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	clocks = <&ssc0_clk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	clock-names = "pclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - DMA transfer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ssc0: ssc@f0010000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)       compatible = "atmel,at91sam9g45-ssc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)       reg = <0xf0010000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)       interrupts = <28 4 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)       dmas = <&dma0 1 13>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	     <&dma0 1 14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)       dma-names = "tx", "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)       pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)       pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };