Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) RK817 Power Management Integrated Circuit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) - compatible: "rockchip,rk817"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) - reg: I2C slave address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) - interrupt-parent: The parent interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) - interrupts: the interrupt outputs of the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) - #clock-cells: from common clock binding; shall be set to 1 (multiple clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)   outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) - clock-output-names: From common clock binding to override the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)   default output clock name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) - rockchip,system-power-controller: Telling whether or not this pmic is controlling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)   the system power.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) - vcc1-supply:  The input supply for DCDC_REG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) - vcc2-supply:  The input supply for DCDC_REG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) - vcc3-supply:  The input supply for DCDC_REG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) - vcc4-supply:  The input supply for DCDC_REG4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) - vcc5-supply:  The input supply for LDO_REG1, LDO_REG2, LDO_REG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) - vcc6-supply:  The input supply for LDO_REG4, LDO_REG5, LDO_REG6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) - vcc7-supply:  The input supply for LDO_REG7, LDO_REG8, LDO_REG9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) - vcc8-supply:  The input supply for BOOST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) - vcc9-supply:  The input supply for OTG_SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) Regulators: All the regulators of RK817 to be instantiated shall be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) listed in a child node named 'regulators'. Each regulator is represented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) by a child node of the 'regulators' node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	regulator-name {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		/* standard regulator bindings here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) Following regulators of the RK817 PMIC block are supported. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) number as described in RK808 datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	- DCDC_REGn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		- valid values for n are 1 to 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	- LDO_REGn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		- valid values for n are 1 to 9.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) There are three pins needed config, named "gpio_ts" "gpio_gt" "gpio_slp".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)     The gpio_gt and gpio_ts pins support the gpio function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)     For using a gpio function, dtsi need the following info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		pinctrl-0 = <&rk817_ts_gpio1>, <&rk817_gt_gpio2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		gpios = <&pinctrl_rk8xx 1 GPIO_ACTIVE_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 			<&pinctrl_rk8xx 2 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)     The gpio_slp pin is for controlling the pmic states, as below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) Standard regulator bindings are used inside regulator subnodes. Check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)   Documentation/devicetree/bindings/regulator/regulator.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) for more details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	rk817: pmic@20 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		compatible = "rockchip,rk817";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		reg = <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		interrupt-parent = <&gpio0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		pinctrl-names = "default", "pmic-sleep",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				"pmic-power-off", "pmic-reset";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		pinctrl-0 = <&pmic_int>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		rockchip,system-power-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		wakeup-source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		#clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		clock-output-names = "rk808-clkout1", "rk808-clkout2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		vcc1-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		vcc2-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		vcc3-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		vcc4-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		vcc5-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		vcc6-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		vcc7-supply = <&vcc_3v0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		vcc8-supply = <&vccsys>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		vcc9-supply = <&dcdc_boost>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		pwrkey {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			status = "okay";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		pinctrl_rk8xx: pinctrl_rk8xx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			rk817_ts_gpio1: rk817_ts_gpio1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				pins = "gpio_ts";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				function = "pin_fun1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				/* output-low; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				/* input-enable; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			rk817_gt_gpio2: rk817_gt_gpio2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				pins = "gpio_gt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				function = "pin_fun1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			rk817_pin_ts: rk817_pin_ts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 				pins = "gpio_ts";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				function = "pin_fun0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			rk817_pin_gt: rk817_pin_gt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				pins = "gpio_gt";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 				function = "pin_fun0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			rk817_slppin_null: rk817_slppin_null {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 				pins = "gpio_slp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 				function = "pin_fun0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			rk817_slppin_slp: rk817_slppin_slp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 				pins = "gpio_slp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				function = "pin_fun1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 				pins = "gpio_slp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				function = "pin_fun2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			rk817_slppin_rst: rk817_slppin_rst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				pins = "gpio_slp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 				function = "pin_fun3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			vdd_logic: DCDC_REG1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 				regulator-min-microvolt = <950000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 				regulator-max-microvolt = <1350000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 				regulator-ramp-delay = <6001>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 				regulator-initial-mode = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 				regulator-name = "vdd_logic";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 					regulator-suspend-microvolt = <950000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			vdd_arm: DCDC_REG2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				regulator-min-microvolt = <950000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 				regulator-max-microvolt = <1350000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 				regulator-ramp-delay = <6001>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 				regulator-initial-mode = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				regulator-name = "vdd_arm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 					regulator-off-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 					regulator-suspend-microvolt = <950000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 			vcc_ddr: DCDC_REG3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 				regulator-initial-mode = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				regulator-name = "vcc_ddr";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			vcc_3v0: DCDC_REG4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				regulator-min-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				regulator-max-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 				regulator-initial-mode = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 				regulator-name = "vcc_3v0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 					regulator-off-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 					regulator-suspend-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			vcc2v5_ddr: LDO_REG1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 				regulator-min-microvolt = <2500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 				regulator-max-microvolt = <2500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				regulator-name = "vcc2v5_ddr";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 					regulator-suspend-microvolt = <2500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			vcc1v8_soc: LDO_REG2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				regulator-min-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 				regulator-max-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 				regulator-name = "vcc1v8_soc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 					regulator-suspend-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			vdd1v0_soc: LDO_REG3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				regulator-min-microvolt = <1000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 				regulator-max-microvolt = <1000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				regulator-name = "vcc1v0_soc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 					regulator-suspend-microvolt = <1000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			vcc3v0_pmu: LDO_REG4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				regulator-min-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 				regulator-max-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				regulator-name = "vcc3v0_pmu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 					regulator-suspend-microvolt = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			vccio_sd: LDO_REG5 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				regulator-min-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				regulator-max-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				regulator-name = "vccio_sd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 					regulator-suspend-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 			vcc_sd: LDO_REG6 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				regulator-min-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 				regulator-max-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 				regulator-name = "vcc_sd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 					regulator-suspend-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			vcc2v8_dvp: LDO_REG7 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 				regulator-min-microvolt = <2800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 				regulator-max-microvolt = <2800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 				regulator-name = "vcc2v8_dvp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 					regulator-off-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 					regulator-suspend-microvolt = <2800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			vcc1v8_dvp: LDO_REG8 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 				regulator-min-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 				regulator-max-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 				regulator-name = "vcc1v8_dvp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 					regulator-on-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 					regulator-suspend-microvolt = <1800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			vdd1v5_dvp: LDO_REG9 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 				regulator-min-microvolt = <1500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				regulator-max-microvolt = <1500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 				regulator-name = "vdd1v5_dvp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 				regulator-state-mem {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 					regulator-off-in-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 					regulator-suspend-microvolt = <1500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 				};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			dcdc_boost: BOOST {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 				regulator-min-microvolt = <4700000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 				regulator-max-microvolt = <5400000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 				regulator-name = "boost";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 			otg_switch: OTG_SWITCH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 				regulator-name = "otg_switch";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		battery {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			compatible = "rk817,battery";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			ocv_table = <3500 3625 3685 3697 3718 3735 3748
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 			3760 3774 3788 3802 3816 3834 3853
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			3877 3908 3946 3975 4018 4071 4106>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			design_capacity = <2500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 			design_qmax = <2750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			bat_res = <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			sleep_enter_current = <300>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			sleep_exit_current = <300>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			sleep_filter_current = <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			power_off_thresd = <3500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			zero_algorithm_vol = <3850>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 			max_soc_offset = <60>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			monitor_sec = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 			sample_res = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 			virtual_power = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		charger {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			compatible = "rk817,charger";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 			min_input_voltage = <4500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 			max_input_current = <1500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			max_chrg_current = <1300>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			max_chrg_voltage = <4200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			chrg_term_mode = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			chrg_finish_cur = <300>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 			virtual_power = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			dc_det_adc = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			extcon = <&u2phy>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		rk817_codec: codec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 			#sound-dai-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 			compatible = "rockchip,rk817-codec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			clocks = <&cru SCLK_I2S1_OUT>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 			clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			pinctrl-0 = <&i2s1_2ch_mclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			hp-volume = <20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			spk-volume = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			status = "okay";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	}