^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Device-Tree bindings for Rockchip RK618 MFD driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: value should be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) "rockchip,rk618"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg: I2C device address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - clocks: phandle to the clkin clock provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - clock-names: Must be "clkin"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reset-gpios: a GPIO spec for the reset pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - power-supply: regulator to provide the supply voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - enable-gpios: a GPIO spec for the enable pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) &i2c5 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) status = "okay";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) rk618: rk618@50 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible = "rockchip,rk618";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) reg = <0x50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) pinctrl-0 = <&i2s_8ch_mclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) clocks = <&cru SCLK_I2S_8CH_OUT>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) clock-names = "clkin";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)