^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) MediaTek MT6397/MT6323 Multifunction Device Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) MT6397/MT6323 is a multifunction device with the following sub modules:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - Regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - Audio codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Keys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - Power controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) It is interfaced to host controller using SPI interface by a proprietary hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) See the following for pwarp node definitions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ../soc/mediatek/pwrap.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) This document describes the binding for MFD device and its sub module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "mediatek,mt6323" for PMIC MT6323
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) "mediatek,mt6358" for PMIC MT6358
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) "mediatek,mt6397" for PMIC MT6397
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Optional subnodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - rtc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Required properties: Should be one of follows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - compatible: "mediatek,mt6323-rtc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - compatible: "mediatek,mt6358-rtc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - compatible: "mediatek,mt6397-rtc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) For details, see ../rtc/rtc-mt6397.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - regulators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - compatible: "mediatek,mt6323-regulator"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) see ../regulator/mt6323-regulator.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - compatible: "mediatek,mt6358-regulator"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) see ../regulator/mt6358-regulator.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - compatible: "mediatek,mt6397-regulator"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) see ../regulator/mt6397-regulator.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - compatible: "mediatek,mt6397-codec" or "mediatek,mt6358-sound"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - compatible: "mediatek,mt6397-clk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - led
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - compatible: "mediatek,mt6323-led"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) see ../leds/leds-mt6323.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - keys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) see ../input/mtk-pmic-keys.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - power-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) - compatible: "mediatek,mt6323-pwrc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) For details, see ../power/reset/mt6323-poweroff.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - pin-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - compatible: "mediatek,mt6397-pinctrl"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) For details, see ../pinctrl/pinctrl-mt65xx.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) pwrap: pwrap@1000f000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) compatible = "mediatek,mt8135-pwrap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) pmic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) compatible = "mediatek,mt6397";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) codec: mt6397codec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) compatible = "mediatek,mt6397-codec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) compatible = "mediatek,mt6397-regulator";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) mt6397_vpca15_reg: buck_vpca15 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) regulator-compatible = "buck_vpca15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) regulator-name = "vpca15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) regulator-min-microvolt = <850000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) regulator-max-microvolt = <1400000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) regulator-ramp-delay = <12500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) mt6397_vgp4_reg: ldo_vgp4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) regulator-compatible = "ldo_vgp4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) regulator-name = "vgp4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) regulator-min-microvolt = <1200000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) regulator-max-microvolt = <3300000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) regulator-enable-ramp-delay = <218>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
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