^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Freescale MX25 ADC/TSC MultiFunction Device (MFD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This device combines two general purpose conversion queues one used for general
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ADC and the other used for touchscreens.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible: Should be "fsl,imx25-tsadc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - reg: Start address and size of the memory area of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - interrupts: Interrupt for this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) (See: ../interrupt-controller/interrupts.txt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupt-controller: This device is an interrupt controller. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) controls the interrupts of both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) conversion queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #interrupt-cells: Should be '<1>'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - #address-cells: Should be '<1>'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - #size-cells: Should be '<1>'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) This device includes two conversion queues which can be added as subnodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) The first queue is for the touchscreen, the second for general purpose ADC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) tscadc: tscadc@50030000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) compatible = "fsl,imx25-tsadc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) reg = <0x50030000 0xc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) interrupts = <46>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) clocks = <&clks 119>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) clock-names = "ipg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) tsc: tcq@50030400 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) compatible = "fsl,imx25-tcq";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) reg = <0x50030400 0x60>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) adc: gcq@50030800 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) compatible = "fsl,imx25-gcq";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) reg = <0x50030800 0x60>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };