Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * ROHM BD9571MWV Power Management Integrated Circuit (PMIC) bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  - compatible		: Should be "rohm,bd9571mwv".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  - reg			: I2C slave address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  - interrupts		: The interrupt line the device is connected to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  - interrupt-controller	: Marks the device node as an interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  - #interrupt-cells	: The number of cells to describe an IRQ, should be 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 			    The first cell is the IRQ number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 			    The second cell is the flags, encoded as trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 			    masks from ../interrupt-controller/interrupts.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  - gpio-controller      : Marks the device node as a GPIO Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  - #gpio-cells          : Should be two.  The first cell is the pin number and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)                             the second cell is used to specify flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)                             See ../gpio/gpio.txt for more information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  - regulators:          : List of child nodes that specify the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)                             initialization data. Child nodes must be named
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)                             after their hardware counterparts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 			     - vd09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 			     - vd18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 			     - vd25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 			     - vd33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 			     - dvfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 			    Each child node is defined using the standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 			    binding for regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   - rohm,ddr-backup-power : Value to use for DDR-Backup Power (default 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			    This is a bitmask that specifies which DDR power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 			    rails need to be kept powered when backup mode is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			    entered, for system suspend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			      - bit 0: DDR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			      - bit 1: DDR1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			      - bit 2: DDR0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			      - bit 3: DDR1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			    These bits match the KEEPON_DDR* bits in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			    documentation for the "BKUP Mode Cnt" register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   - rohm,rstbmode-level: The RSTB signal is configured for level mode, to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			 accommodate a toggle power switch (the RSTBMODE pin is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			 strapped low).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   - rohm,rstbmode-pulse: The RSTB signal is configured for pulse mode, to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			 accommodate a momentary power switch (the RSTBMODE pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			 is strapped high).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			 The two properties above are mutually exclusive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	pmic: pmic@30 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		compatible = "rohm,bd9571mwv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		reg = <0x30>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		interrupt-parent = <&gpio2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		#interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		rohm,ddr-backup-power = <0xf>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		rohm,rstbmode-pulse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 			dvfs: dvfs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 				regulator-name = "dvfs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 				regulator-min-microvolt = <750000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 				regulator-max-microvolt = <1030000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 				regulator-boot-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 				regulator-always-on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	};