^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) The Aspeed System Control Unit manages the global behaviour of the SoC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) configuring elements such as clocks, pinmux, and reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible: One of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) "aspeed,ast2400-scu", "syscon", "simple-mfd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) "aspeed,ast2500-scu", "syscon", "simple-mfd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: contains the offset and length of the SCU memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #clock-cells: should be set to <1> - the system controller is also a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) clock provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - #reset-cells: should be set to <1> - the system controller is also a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) reset line provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) syscon: syscon@1e6e2000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) reg = <0x1e6e2000 0x1a8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #reset-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };