^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Texas Instruments AM437x CAMERA (VPFE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) --------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The Video Processing Front End (VPFE) is a key component for image capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) applications. The capture module provides the system interface and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) processing capability to connect RAW image-sensor modules and video decoders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) to the AM437x device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible: must be "ti,am437x-vpfe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reg: physical base address and length of the registers set for the device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - interrupts: should contain IRQ line for the VPFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - ti,am437x-vpfe-interface: can be one of the following,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 0 - Raw Bayer Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 1 - 8 Bit BT656 Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 2 - 10 Bit BT656 Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 3 - YCbCr 8 Bit Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 4 - YCbCr 16 Bit Interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) VPFE supports a single port node with parallel bus. It should contain one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 'port' child node with child 'endpoint' node. Please refer to the bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) vpfe: vpfe@f0034000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) compatible = "ti,am437x-vpfe";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) reg = <0x48328000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) pinctrl-names = "default", "sleep";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) pinctrl-0 = <&vpfe_pins_default>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) pinctrl-1 = <&vpfe_pins_sleep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) vpfe0_ep: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) remote-endpoint = <&ov2659_1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ti,am437x-vpfe-interface = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) hsync-active = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) vsync-active = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) i2c1: i2c@4802a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ov2659@30 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) compatible = "ti,ov2659";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reg = <0x30>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ov2659_1: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) remote-endpoint = <&vpfe0_ep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) mclk-frequency = <12000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };