^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Samsung S5P/Exynos SoC Camera Subsystem (FIMC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ----------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) represented by separate device tree nodes. Currently this includes: FIMC (in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) the S5P SoCs series known as CAMIF), MIPI CSIS, FIMC-LITE and FIMC-IS (ISP).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) The sub-subdevices are defined as child nodes of the common 'camera' node which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) also includes common properties of the whole subsystem not really specific to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) any single sub-device, like common camera port pins or the CAMCLK clock outputs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) for external image sensors attached to an SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Common 'camera' node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - compatible: must be "samsung,fimc", "simple-bus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - clocks: list of clock specifiers, corresponding to entries in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) the clock-names property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - clock-names : must contain "sclk_cam0", "sclk_cam1", "pxl_async0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) "pxl_async1" entries, matching entries in the clocks property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - #clock-cells: from the common clock bindings (../clock/clock-bindings.txt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) must be 1. A clock provider is associated with the 'camera' node and it should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) be referenced by external sensors that use clocks provided by the SoC on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) CAM_*_CLKOUT pins. The clock specifier cell stores an index of a clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) The indices are 0, 1 for CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - clock-output-names: from the common clock bindings, should contain names of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clocks registered by the camera subsystem corresponding to CAM_A_CLKOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) CAM_B_CLKOUT output clocks respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) The pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt must be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) to define a required pinctrl state named "default" and optional pinctrl states:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "idle", "active-a", active-b". These optional states can be used to switch the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) camera port pinmux at runtime. The "idle" state should configure both the camera
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ports A and B into high impedance state, especially the CAMCLK clock output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) should be inactive. For the "active-a" state the camera port A must be activated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) and the port B deactivated and for the state "active-b" it should be the other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) way around.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) The 'camera' node must include at least one 'fimc' child node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 'fimc' device nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) -------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - compatible: "samsung,s5pv210-fimc" for S5PV210, "samsung,exynos4210-fimc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) for Exynos4210 and "samsung,exynos4212-fimc" for Exynos4x12 SoCs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - reg: physical base address and length of the registers set for the device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) - interrupts: should contain FIMC interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - clocks: list of clock specifiers, must contain an entry for each required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) entry in clock-names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - clock-names: must contain "fimc", "sclk_fimc" entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - samsung,pix-limits: an array of maximum supported image sizes in pixels, for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) details refer to Table 2-1 in the S5PV210 SoC User Manual; The meaning of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) each cell is as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0 - scaler input horizontal size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 1 - input horizontal size for the scaler bypassed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 2 - REAL_WIDTH without input rotation,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 3 - REAL_HEIGHT with input rotation,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - samsung,sysreg: a phandle to the SYSREG node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) Each FIMC device should have an alias in the aliases node, in the form of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) fimc<n>, where <n> is an integer specifying the IP block instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - clock-frequency: maximum FIMC local clock (LCLK) frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - samsung,min-pix-sizes: an array specyfing minimum image size in pixels at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) the FIMC input and output DMA, in the first and second cell respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Default value when this property is not present is <16 16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) - samsung,min-pix-alignment: minimum supported image height alignment (first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) cell) and the horizontal image offset (second cell). The values are in pixels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) and default to <2 1> when this property is not present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - samsung,mainscaler-ext: a boolean property indicating whether the FIMC IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) supports extended image size and has CIEXTEN register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - samsung,rotators: a bitmask specifying whether this IP has the input and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) the output rotator. Bits 4 and 0 correspond to input and output rotator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) respectively. If a rotator is present its corresponding bit should be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Default value when this property is not specified is 0x11.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - samsung,cam-if: a bolean property indicating whether the IP block includes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) the camera input interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - samsung,isp-wb: this property must be present if the IP block has the ISP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) writeback input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - samsung,lcd-wb: this property must be present if the IP block has the LCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) writeback input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 'parallel-ports' node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) This node should contain child 'port' nodes specifying active parallel video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) input ports. It includes camera A and camera B inputs. 'reg' property in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) port nodes specifies data input - 1, 2 indicates input A, B respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) Optional properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - samsung,camclk-out (deprecated) : specifies clock output for remote sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 0 - CAM_A_CLKOUT, 1 - CAM_B_CLKOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) Image sensor nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) The sensor device nodes should be added to their control bus controller (e.g.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) I2C0) nodes and linked to a port node in the csis or the parallel-ports node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) using the common video interfaces bindings, defined in video-interfaces.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) aliases {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) fimc0 = &fimc_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Parallel bus IF sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) i2c_0: i2c@13860000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) s5k6aa: sensor@3c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) compatible = "samsung,s5k6aafx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) reg = <0x3c>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) vddio-supply = <...>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) clock-frequency = <24000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) clocks = <&camera 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) s5k6aa_ep: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) remote-endpoint = <&fimc0_ep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) hsync-active = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) vsync-active = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) pclk-sample = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* MIPI CSI-2 bus IF sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) s5c73m3: sensor@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) compatible = "samsung,s5c73m3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) vddio-supply = <...>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) clock-frequency = <24000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) clocks = <&camera 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) s5c73m3_1: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) data-lanes = <1 2 3 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) remote-endpoint = <&csis0_ep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) camera {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) compatible = "samsung,fimc", "simple-bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) clocks = <&clock 132>, <&clock 133>, <&clock 351>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) <&clock 352>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) "pxl_async1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) clock-output-names = "cam_a_clkout", "cam_b_clkout";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pinctrl-0 = <&cam_port_a_clk_active>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* parallel camera ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) parallel-ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* camera A input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) port@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) fimc0_ep: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) remote-endpoint = <&s5k6aa_ep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) bus-width = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) hsync-active = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) vsync-active = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) pclk-sample = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) fimc_0: fimc@11800000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) compatible = "samsung,exynos4210-fimc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) reg = <0x11800000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) interrupts = <0 85 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) csis_0: csis@11880000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) compatible = "samsung,exynos4210-csis";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) reg = <0x11880000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) interrupts = <0 78 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* camera C input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) port@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) csis0_ep: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) remote-endpoint = <&s5c73m3_ep>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) data-lanes = <1 2 3 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) samsung,csis-hs-settle = <12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) The MIPI-CSIS device binding is defined in samsung-mipi-csis.txt.