Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) device-tree bindings for rockchip Transport Stream Processing Module (TSP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) TSP is designed for processing Transport Stream Packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) including receiving TS packets, PID filtering, TS descrambling,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) De-multiplexing and TS outputting.Processed data are transferred to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) memory buffer which are continued to be processing by software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - compatible: value should be one of the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 		"rockchip,rk312x-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 		"rockchip,rk3228-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 		"rockchip,rk3288-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 		"rockchip,rk3328-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		"rockchip,rk3368-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - reg : offset and length of the register set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - interrupts: TSP interrupt specifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - interrupts-name: should be "irq_tsp".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - clocks: phandle to TSP sclk/hclk/aclk clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - clock-names: should be "clk_tsp", "hclk_tsp" and "aclk_tsp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - pinctrl-names: use "default"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - pinctrl-0: pin config for iomux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SoC-specific DT entry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	tsp: tsp@ff050000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		compatible = "rockchip,rk3328-tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		reg = <0x0 0xff050000 0x0 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		rockchip,grf = <&grf>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		interrupt-names = "irq_tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		clocks = <&cru SCLK_TSP>, <&cru ACLK_TSP>, <&cru HCLK_TSP>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		clock-names = "clk_tsp", "aclk_tsp", "hclk_tsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		pinctrl-0 = <&tsp_d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			     &tsp_d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			     &tsp_d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			     &tsp_d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			     &tsp_d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			     &tsp_d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			     &tsp_d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 			     &tsp_d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			     &tsp_sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			     &tsp_clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 			     &tsp_fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 			     &tsp_valid>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		status = "disabled";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	};