^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Freescale Video Data Order Adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ==================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The Video Data Order Adapter (VDOA) is present on the i.MX6q. Its sole purpose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) is to reorder video data from the macroblock tiled order produced by the CODA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) 960 VPU to the conventional raster-scan order for scanout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - compatible: must be "fsl,imx6q-vdoa"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg: the register base and size for the device registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts: the VDOA interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: the vdoa clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) vdoa@21e4000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) compatible = "fsl,imx6q-vdoa";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) reg = <0x021e4000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) clocks = <&clks IMX6QDL_CLK_VDOA>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };