Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Atmel Image Sensor Controller (ISC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ----------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties for ISC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	Must be "atmel,sama5d2-isc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	Physical base address and length of the registers set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	Should contain IRQ line for the ISC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	List of clock specifiers, corresponding to entries in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	the clock-names property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	Please refer to clock-bindings.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	Required elements: "hclock", "iscck", "gck".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - #clock-cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	Should be 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - clock-output-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	Should be "isc-mck".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - pinctrl-names, pinctrl-0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	Please refer to pinctrl-bindings.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ISC supports a single port node with parallel bus. It should contain one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 'port' child node with child 'endpoint' node. Please refer to the bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) isc: isc@f0008000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	compatible = "atmel,sama5d2-isc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	reg = <0xf0008000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	clock-names = "hclock", "iscck", "gck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	#clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	clock-output-names = "isc-mck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		isc_0: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			remote-endpoint = <&ov7740_0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			hsync-active = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			vsync-active = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			pclk-sample = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) i2c1: i2c@fc028000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	ov7740: camera@21 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		compatible = "ovti,ov7740";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		reg = <0x21>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		clocks = <&isc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		clock-names = "xvclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		assigned-clocks = <&isc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		assigned-clock-rates = <24000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			ov7740_0: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 				remote-endpoint = <&isc_0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };