^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) The APM X-Gene SLIMpro mailbox is used to communicate messages between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) interrupt based door bell mechanism and can exchange simple messages using the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) internal registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) There are total of 8 interrupts in this mailbox. Each used for an individual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) door bell (or mailbox channel).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible: Should be as "apm,xgene-slimpro-mbox".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - reg: Contains the mailbox register address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) the interrupt for mailbox channel 0 and interrupt 1 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) mailbox channel 1 and so likewise for the reminder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - #mbox-cells: only one to specify the mailbox channel number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Mailbox Node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) mailbox: mailbox@10540000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) compatible = "apm,xgene-slimpro-mbox";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) reg = <0x0 0x10540000 0x0 0xa000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #mbox-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) interrupts = <0x0 0x0 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) <0x0 0x1 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) <0x0 0x2 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) <0x0 0x3 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) <0x0 0x4 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) <0x0 0x5 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) <0x0 0x6 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) <0x0 0x7 0x4>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };