Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Rockchip mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The Rockchip mailbox is used by the Rockchip CPU cores to communicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) requests to MCU processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Refer to ./mailbox.txt for generic information about mailbox device-tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  - compatible: should be one of the following.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)    - "rockchip,rk3368-mbox" for rk3368
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  - interrupts: The interrupt number to the cpu. The interrupt specifier format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	depends on the interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  - #mbox-cells: Common mailbox binding property to identify the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	of cells required for the mailbox specifier. Should be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Optional properties :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  - wakeup-source: Mailbox irq can be used as a wakeup source.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* RK3368 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) mbox: mbox@ff6b0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	compatible = "rockchip,rk3368-mailbox";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	reg = <0x0 0xff6b0000 0x0 0x1000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	#mbox-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };