^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: TI/National Semiconductor LP55xx and LP8501 LED Drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Jacek Anaszewski <jacek.anaszewski@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - Pavel Machek <pavel@ucw.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) LED Drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) For more product information please see the link below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) https://www.ti.com/lit/gpn/lp5521
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) https://www.ti.com/lit/gpn/lp5523
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) https://www.ti.com/lit/gpn/lp55231
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) https://www.ti.com/lit/gpn/lp5562
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) https://www.ti.com/lit/gpn/lp8501
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - national,lp5521
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - national,lp5523
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - ti,lp55231
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - ti,lp5562
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - ti,lp8501
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) description: I2C slave address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) clock-mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) $ref: /schemas/types.yaml#definitions/uint8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Input clock mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - 0 # automode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - 1 # internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - 2 # external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) enable-gpio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GPIO attached to the chip's enable pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) pwr-sel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) $ref: /schemas/types.yaml#definitions/uint8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) LP8501 specific property. Power selection for output channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - 0 # D1~9 are connected to VDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - 1 # D1~6 with VDD, D7~9 with VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - 2 # D1~6 with VOUT, D7~9 with VDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - 3 # D1~9 are connected to VOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) '#address-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) '#size-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "(^led@[0-9a-f]$|led)":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) $ref: common.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) led-cur:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) $ref: /schemas/types.yaml#definitions/uint8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Current setting at each LED channel (mA x10, 0 if LED is not connected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) maximum: 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) max-cur:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) $ref: /schemas/types.yaml#definitions/uint8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) description: Maximun current at each LED channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) Output channel for the LED. This is zero based channel identifier and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) the data sheet is a one based channel identifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) reg value to output to LED output number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - 0 # LED output D1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) - 1 # LED output D2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) - 2 # LED output D3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - 3 # LED output D4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) - 4 # LED output D5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - 5 # LED output D6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) - 6 # LED output D7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) - 7 # LED output D8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) - 8 # LED output D9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) chan-name:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) $ref: /schemas/types.yaml#definitions/string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) description: name of channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #include <dt-bindings/leds/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) i2c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) led-controller@32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) compatible = "ti,lp8501";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) reg = <0x32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) clock-mode = /bits/ 8 <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) led@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) chan-name = "d1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) led@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) chan-name = "d2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) led@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) reg = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) chan-name = "d3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) led@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) chan-name = "d4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) led@4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) reg = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) chan-name = "d5";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) led@5 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) reg = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) chan-name = "d6";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) led@6 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) reg = <6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) chan-name = "d7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) led@7 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) reg = <7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) chan-name = "d8";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) led@8 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) reg = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) chan-name = "d9";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) led-cur = /bits/ 8 <0x14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) max-cur = /bits/ 8 <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) led-controller@33 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) compatible = "national,lp5523";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) reg = <0x33>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) clock-mode = /bits/ 8 <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) multi-led@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) reg = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) color = <LED_COLOR_ID_RGB>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) function = LED_FUNCTION_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) linux,default-trigger = "heartbeat";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) led@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) led-cur = /bits/ 8 <50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) max-cur = /bits/ 8 <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) reg = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) color = <LED_COLOR_ID_GREEN>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) led@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) led-cur = /bits/ 8 <50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) max-cur = /bits/ 8 <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) reg = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) color = <LED_COLOR_ID_BLUE>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) led@6 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) led-cur = /bits/ 8 <50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) max-cur = /bits/ 8 <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) reg = <0x6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) color = <LED_COLOR_ID_RED>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ...