^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ZTE zx2967 I2C controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: must be "zte,zx296718-i2c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: physical address and length of the device registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - interrupts: a single interrupt specifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - clocks: clock for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - #address-cells: should be <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - #size-cells: should be <0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clock-frequency: the desired I2C bus clock frequency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) i2c@112000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) compatible = "zte,zx296718-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) reg = <0x00112000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) clocks = <&osc24m>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #address-cells = <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) clock-frequency = <1600000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };