Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ST SSC binding, for I2C mode operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg : Offset and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - interrupts : the interrupt specifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clock-names: Must contain "ssc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clocks: Must contain an entry for each name in clock-names. See the common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   clock bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - A pinctrl state named "default" must be defined to set pins in mode of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   operation for I2C transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   the default 100 kHz frequency will be used. As only Normal and Fast modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   are supported, possible values are 100000 and 400000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   allowed through the deglitch circuit. In units of us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   allowed through the deglitch circuit. In units of us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - A pinctrl state named "idle" could be defined to set pins in idle state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   when I2C instance is not performing a transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - A pinctrl state named "sleep" could be defined to set pins in sleep state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   when driver enters in suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Example :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) i2c0: i2c@fed40000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	compatible	= "st,comms-ssc4-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	reg		= <0xfed40000 0x110>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	interrupts	=  <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	clocks		= <&clk_s_a0_ls CLK_ICN_REG>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	clock-names	= "ssc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	clock-frequency = <400000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	pinctrl-names	= "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	pinctrl-0	= <&pinctrl_i2c0_default>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	st,i2c-min-scl-pulse-width-us = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	st,i2c-min-sda-pulse-width-us = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };