Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Samsung's I2C controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The Samsung's I2C controller is used to interface with I2C devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   - compatible: value should be either of the following.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)       (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)       (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)       (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)           inside HDMIPHY block found on several samsung SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)       (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	   a host to SATA PHY controller on an internal bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)     region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   - interrupts: interrupt number to the cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Required for all cases except "samsung,s3c2440-hdmiphy-i2c":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   - Samsung GPIO variant (deprecated):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)     - gpios: The order of the gpios should be the following: <SDA, SCL>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)       The gpio specifier depends on the gpio controller. Required in all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)       cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)       lines are permanently wired to the respective clienta
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   - Pinctrl variant (preferred, if available):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)     - pinctrl-0: Pin control group to be used for this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)     - pinctrl-names: Should contain only one value - "default".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   - samsung,i2c-slave-addr: Slave address in multi-master environment. If not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     specified, default value is 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)     specified, the default value in Hz is 100000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)   - samsung,sysreg-phandle - handle to syscon used to control the system registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	i2c@13870000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		compatible = "samsung,s3c2440-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		reg = <0x13870000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		interrupts = <345>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		samsung,i2c-sda-delay = <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		samsung,i2c-max-bus-freq = <100000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		/* Samsung GPIO variant begins here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		gpios = <&gpd1 2 0 /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			 &gpd1 3 0 /* SCL */>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		/* Samsung GPIO variant ends here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		/* Pinctrl variant begins here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		pinctrl-0 = <&i2c3_bus>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		/* Pinctrl variant ends here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		wm8994@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			compatible = "wlf,wm8994";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 			reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	};