^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Rockchip RK3xxx I2C controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This driver interfaces with the native I2C controller present in Rockchip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) RK3xxx SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - $ref: /schemas/i2c/i2c-controller.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - Heiko Stuebner <heiko@sntech.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) # Everything else is described in the common file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - const: rockchip,rv1108-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - const: rockchip,rk3066-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - const: rockchip,rk3188-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - const: rockchip,rk3228-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - const: rockchip,rk3288-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - const: rockchip,rk3399-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - rockchip,rk3036-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - rockchip,rk3368-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - const: rockchip,rk3288-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - rockchip,px30-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - rockchip,rk3308-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - rockchip,rk3328-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - const: rockchip,rk3399-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) For older hardware (rk3066, rk3188, rk3228, rk3288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) there is one clock that is used both to derive the functional clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) for the device and as the bus clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) For newer hardware (rk3399) this clock is used to derive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) the functional clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) For newer hardware (rk3399) this is the bus clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - const: i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - const: pclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) rockchip,grf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) $ref: /schemas/types.yaml#/definitions/phandle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Required on RK3066, RK3188 the phandle of the syscon node for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) the general register file (GRF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) On those SoCs an alias with the correct I2C bus ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) (bit offset in the GRF) is also required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) clock-frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) default: 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) SCL frequency to use (in Hz). If omitted, 100kHz is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) i2c-scl-rising-time-ns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) default: 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) Number of nanoseconds the SCL signal takes to rise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) (t(r) in I2C specification). If not specified this is assumed to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) the maximum the specification allows(1000 ns for Standard-mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 300 ns for Fast-mode) which might cause slightly slower communication.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) i2c-scl-falling-time-ns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) default: 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Number of nanoseconds the SCL signal takes to fall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) (t(f) in the I2C specification). If not specified this is assumed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) be the maximum the specification allows (300 ns) which might cause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) slightly slower communication.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) i2c-sda-falling-time-ns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) default: 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) Number of nanoseconds the SDA signal takes to fall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) (t(f) in the I2C specification). If not specified we will use the SCL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) value since they are the same in nearly all cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) - rockchip,rk3066-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - rockchip,rk3188-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) then:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) - rockchip,grf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #include <dt-bindings/clock/rk3188-cru-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #include <dt-bindings/interrupt-controller/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) i2c0: i2c@2002d000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) compatible = "rockchip,rk3188-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) reg = <0x2002d000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) clocks = <&cru PCLK_I2C0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) clock-names = "i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) rockchip,grf = <&grf>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) i2c-scl-falling-time-ns = <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) i2c-scl-rising-time-ns = <800>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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