^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) CE4100 I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) CE4100 has one PCI device which is described as the I2C-Controller. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) PCI device has three PCI-bars, each bar contains a complete I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) controller. So we have a total of three independent I2C-Controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) which share only an interrupt line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) The driver is probed via the PCI-ID and is gathering the information of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) attached devices from the devices tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Grant Likely recommended to use the ranges property to map the PCI-Bar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) number to its physical address and to use this to find the child nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) of the specific I2C controller. This were his exact words:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Here's where the magic happens. Each entry in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ranges describes how the parent pci address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) (middle group of 3) is translated to the local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) address space (first group of 2) and the size of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) each range (last cell). In this particular case,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) the first cell of the local address is chosen to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 1:1 mapped to the BARs, and the second is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) offset from be base of the BAR (which would be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) non-zero if you had 2 or more devices mapped off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) the same BAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ranges allows the address mapping to be described
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) in a way that the OS can interpret without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) requiring custom device driver code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) This is an example which is used on FalconFalls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) i2c-controller@b,2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #address-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) compatible = "pci8086,2e68.2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "pci8086,2e68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "pciclass,ff0000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "pciclass,ff00";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) reg = <0x15a00 0x0 0x0 0x0 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) interrupts = <16 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* as described by Grant, the first number in the group of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * three is the bar number followed by the 64bit bar address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * followed by size of the mapping. The bar address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * requires also a valid translation in parents ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ranges = <0 0 0x02000000 0 0xdffe0500 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 1 0 0x02000000 0 0xdffe0600 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 2 0 0x02000000 0 0xdffe0700 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) i2c@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) compatible = "intel,ce4100-i2c-controller";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* The first number in the reg property is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * number of the bar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) reg = <0 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* This I2C controller has no devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) i2c@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) compatible = "intel,ce4100-i2c-controller";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) reg = <1 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* This I2C controller has one gpio controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) gpio@26 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) compatible = "ti,pcf8575";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) reg = <0x26>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) i2c@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) compatible = "intel,ce4100-i2c-controller";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) reg = <2 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) gpio@26 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) compatible = "ti,pcf8575";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reg = <0x26>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
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Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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