^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Common i2c bus multiplexer/switch properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) An i2c bus multiplexer/switch will have several child busses that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) numbered uniquely in a device dependent manner. The nodes for an i2c bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) multiplexer/switch will have one child node for each child bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) This property is required if the i2c-mux child node does not exist.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) This property is required if the i2c-mux child node does not exist.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - i2c-mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) For i2c multiplexers/switches that have child nodes that are a mixture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) of both i2c child busses and other child nodes, the 'i2c-mux' subnode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) can be used for populating the i2c child busses. If an 'i2c-mux'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) subnode is present, only subnodes of this will be considered as i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) child busses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Required properties for the i2c-mux child node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Required properties for i2c child bus nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - reg : The sub-bus number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Optional properties for i2c child bus nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - Other properties specific to the multiplexer/switch hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - Child nodes conforming to i2c bus binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Example :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) An NXP pca9548 8 channel I2C multiplexer at address 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) with two NXP pca8574 GPIO expanders attached, one each to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ports 3 and 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) mux@70 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) compatible = "nxp,pca9548";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) reg = <0x70>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) i2c@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) gpio1: gpio@38 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) compatible = "nxp,pca8574";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) reg = <0x38>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) i2c@4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) reg = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) gpio2: gpio@38 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) compatible = "nxp,pca8574";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) reg = <0x38>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };