^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) GPIO-based I2C Bus Mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This binding describes an I2C bus multiplexer that uses GPIOs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) route the I2C signals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) +-----+ +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) | dev | | dev |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) +------------+ +-----+ +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) | SoC | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) | | /--------+--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) | +------+ | +------+ child bus A, on GPIO value set to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) | | I2C |-|--| Mux |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) | +------+ | +--+---+ child bus B, on GPIO value set to 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) | | | \----------+--------+--------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) | +------+ | | | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) | | GPIO |-|-----+ +-----+ +-----+ +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) | +------+ | | dev | | dev | | dev |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) +------------+ +-----+ +-----+ +-----+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - compatible: i2c-mux-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) port is connected to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - mux-gpios: list of gpios used to control the muxer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Standard I2C mux properties. See i2c-mux.txt in this directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * I2C child bus nodes. See i2c-mux.txt in this directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - idle-state: value to set the muxer to when idle. When no value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) given, it defaults to the last value used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) For each i2c child node, an I2C child bus will be created. They will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) be numbered based on their order in the device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Whenever an access is made to a device on a child bus, the value set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) in the relevant node's reg property will be output using the list of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) GPIOs, the first in the list holding the least-significant value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) If an idle state is defined, using the idle-state (optional) property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) whenever an access is not being made to a device on a child bus, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) GPIOs will be set according to the idle value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) If an idle state is not defined, the most recently used value will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) left programmed into hardware whenever no access is being made to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) device on a child bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) i2cmux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) compatible = "i2c-mux-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) i2c-parent = <&i2c1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) i2c@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ssd1307: oled@3c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) compatible = "solomon,ssd1307fb-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) reg = <0x3c>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) pwms = <&pwm 4 3000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) reset-gpios = <&gpio2 7 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) reset-active-low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) i2c@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) pca9555: pca9555@20 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) compatible = "nxp,pca9555";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg = <0x20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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