^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Wolfram Sang <wolfram@the-dreams.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - $ref: /schemas/i2c/i2c-controller.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - const: fsl,imx1-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - const: fsl,imx21-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - const: fsl,vf610-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - const: fsl,imx35-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - const: fsl,imx1-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - const: fsl,imx7d-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - const: fsl,imx21-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - fsl,imx25-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - fsl,imx27-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - fsl,imx31-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - fsl,imx50-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - fsl,imx51-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - fsl,imx53-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - fsl,imx6q-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - fsl,imx6sl-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - fsl,imx6sx-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - fsl,imx6sll-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - fsl,imx6ul-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - fsl,imx7s-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - fsl,imx8mq-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - fsl,imx8mm-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - fsl,imx8mn-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - fsl,imx8mp-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - const: fsl,imx21-i2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) const: ipg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) clock-frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) enum: [ 100000, 400000 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) dmas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) - description: DMA controller phandle and request line for RX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - description: DMA controller phandle and request line for TX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dma-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) - const: rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) - const: tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) sda-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) scl-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #include <dt-bindings/clock/imx5-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #include <dt-bindings/clock/vf610-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #include <dt-bindings/gpio/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) i2c@83fc4000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) reg = <0x83fc4000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) interrupts = <63>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) clocks = <&clks IMX5_CLK_I2C2_GATE>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) i2c@40066000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) compatible = "fsl,vf610-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) reg = <0x40066000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) clocks = <&clks VF610_CLK_I2C0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) clock-names = "ipg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dmas = <&edma0 0 50>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) <&edma0 0 51>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };