^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Freescale Low Power Inter IC (LPI2C) for i.MX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - $ref: /schemas/i2c/i2c-controller.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - fsl,imx7ulp-lpi2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - fsl,imx8qm-lpi2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - const: fsl,imx8qxp-lpi2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - const: fsl,imx7ulp-lpi2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) assigned-clock-parents: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) assigned-clock-rates: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) assigned-clocks: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) clock-frequency: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) power-domains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <dt-bindings/clock/imx7ulp-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) i2c@40a50000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) compatible = "fsl,imx7ulp-lpi2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) reg = <0x40A50000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clocks = <&clks IMX7ULP_CLK_LPI2C7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };