Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) =================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This uses GPIO lines and a challenge & response mechanism to arbitrate who is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) the master of an I2C bus in a multimaster situation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) In many cases using GPIOs to arbitrate is not needed and a design can use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) the standard I2C multi-master rules.  Using GPIOs is generally useful in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) the case where there is a device on the bus that has errata and/or bugs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) that makes standard multimaster mode not feasible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Note that this scheme works well enough but has some downsides:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * It is nonstandard (not using standard I2C multimaster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Having two masters on a bus in general makes it relatively hard to debug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   problems (hard to tell if i2c issues were caused by one master, another, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   some device on the bus).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Algorithm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) All masters on the bus have a 'bus claim' line which is an output that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) others can see. These are all active low with pull-ups enabled.  We'll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) describe these lines as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - OUR_CLAIM: output from us signaling to other hosts that we want the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - THEIR_CLAIMS: output from others signaling that they want the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) The basic algorithm is to assert your line when you want the bus, then make
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) sure that the other side doesn't want it also.  A detailed explanation is best
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) done with an example.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Let's say we want to claim the bus.  We:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 1. Assert OUR_CLAIM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 2. Waits a little bit for the other sides to notice (slew time, say 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)    microseconds).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 3. Check THEIR_CLAIMS.  If none are asserted then the we have the bus and we are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)    done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 4. Otherwise, wait for a few milliseconds and see if THEIR_CLAIMS are released.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 5. If not, back off, release the claim and wait for a few more milliseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 6. Go back to 1 (until retry time has expired).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - compatible: i2c-arb-gpio-challenge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - our-claim-gpio: The GPIO that we use to claim the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - their-claim-gpios: The GPIOs that the other sides use to claim the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   Note that some implementations may only support a single other master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - I2C arbitration bus node. See i2c-arb.txt in this directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - wait-retry-us: we'll attempt another claim after this many microseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)     Default is 3000 us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - wait-free-us: we'll give up after this many microseconds. Default is 50000 us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	i2c@12ca0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		compatible = "acme,some-i2c-device";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	i2c-arbitrator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		compatible = "i2c-arb-gpio-challenge";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		i2c-parent = <&{/i2c@12CA0000}>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		our-claim-gpio = <&gpf0 3 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		their-claim-gpios = <&gpe0 4 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		slew-delay-us = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		wait-retry-us = <3000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		wait-free-us = <50000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 		i2c-arb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 			#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 			#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 			i2c@52 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 				// Normal I2C device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	};