^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) OMAP SSI controller bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) OMAP3's Synchronous Serial Interface (SSI) controller implements a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) while the controller found inside OMAP4 is supposed to be fully compliant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) with the HSI standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg-names: Contains the values "sys" and "gdd" (in this order).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reg: Contains a matching register specifier for each entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) in reg-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupt-names: Contains the value "gdd_mpu".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - interrupts: Contains matching interrupt information for each entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) in interrupt-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - ranges: Represents the bus address mapping between the main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) controller node and the child nodes below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - clock-names: Must include the following entries:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "ssi_ssr_fck": The OMAP clock of that name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) "ssi_sst_fck": The OMAP clock of that name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "ssi_ick": The OMAP clock of that name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - clocks: Contains a matching clock specifier for each entry in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) clock-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - #address-cells: Should be set to <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - #size-cells: Should be set to <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Each port is represented as a sub-node of the ti,omap3-ssi device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Required Port sub-node properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - compatible: Should be set to the following value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ti,omap3-ssi-port (applicable to OMAP34xx devices)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ti,omap4-hsi-port (applicable to OMAP44xx devices)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - reg-names: Contains the values "tx" and "rx" (in this order).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - reg: Contains a matching register specifier for each entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) in reg-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - interrupts: Should contain interrupt specifiers for mpu interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 0 and 1 (in this order).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) events for the port. This is an optional board-specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) property. If it's missing the port will not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - ti,hwmods: Shall contain TI interconnect module name if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) by the SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Example for Nokia N900:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ssi-controller@48058000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) compatible = "ti,omap3-ssi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* needed until hwmod is updated to use the compatible string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ti,hwmods = "ssi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) reg = <0x48058000 0x1000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) <0x48059000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) reg-names = "sys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "gdd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) interrupts = <55>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) interrupt-names = "gdd_mpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clocks = <&ssi_ssr_fck>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) <&ssi_sst_fck>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) <&ssi_ick>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) clock-names = "ssi_ssr_fck",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) "ssi_sst_fck",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "ssi_ick";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ssi-port@4805a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) compatible = "ti,omap3-ssi-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) reg = <0x4805a000 0x800>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) <0x4805a800 0x800>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) reg-names = "tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) interrupts = <67>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) <68>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ssi-port@4805a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) compatible = "ti,omap3-ssi-port";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) reg = <0x4805b000 0x800>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) <0x4805b800 0x800>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) reg-names = "tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) interrupts = <69>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) <70>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags