Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Device tree configuration for the GFX display device on the ASPEED SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)     * Must be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)       + aspeed,ast2500-gfx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)       + aspeed,ast2400-gfx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)     * In addition, the ASPEED pinctrl bindings require the 'syscon' property to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)       be present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   - reg: Physical base address and length of the GFX registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - interrupts: interrupt number for the GFX device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   - clocks: clock number used to generate the pixel clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   - resets: reset line that must be released to use the GFX device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   - memory-region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)     Phandle to a memory region to allocate from, as defined in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)     Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) gfx: display@1e6e6000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	compatible = "aspeed,ast2500-gfx", "syscon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	reg = <0x1e6e6000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	resets = <&syscon ASPEED_RESET_CRT1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	interrupts = <0x19>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	memory-region = <&gfx_memory>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) gfx_memory: framebuffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	size = <0x01000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	alignment = <0x01000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	compatible = "shared-dma-pool";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	reusable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };