^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ZTE ZX296702 GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible : "zte,zx296702-gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - #gpio-cells : Should be two. The first cell is the pin number and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) second cell is used to specify optional parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - bit 0 specifies polarity (0 for normal, 1 for inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - gpio-controller : Marks the device node as a GPIO controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - interrupts : Interrupt mapping for GPIO IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - gpio-ranges : Interaction with the PINCTRL subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) gpio1: gpio@b008040 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) compatible = "zte,zx296702-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) reg = <0xb008040 0x40>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) gpio-ranges = < &pmx0 0 54 2 &pmx0 2 59 14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) clock-names = "gpio_pclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) clocks = <&lsp0clk ZX296702_GPIO_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };