Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Xilinx plb/axi GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Dual channel GPIO controller with configurable number of pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) (from 1 to 32 per channel). Every pin can be configured as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) input/output/tristate. Both channels share the same global IRQ but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) local interrupts can be enabled on channel basis.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - compatible : Should be "xlnx,xps-gpio-1.00.a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg : Address and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #gpio-cells : Should be two. The first cell is the pin number and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   second cell is used to specify optional parameters (currently unused).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - gpio-controller : Marks the device node as a GPIO controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - interrupts : Interrupt mapping for GPIO IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - xlnx,gpio-width : gpio width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - xlnx,is-dual : if 1, controller also uses the second channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - xlnx,all-inputs-2 : as above but for the second channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - xlnx,dout-default-2 : as above but the second channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - xlnx,gpio2-width : as above but for the second channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - xlnx,tri-default-2 : as above but for the second channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) gpio: gpio@40000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	compatible = "xlnx,xps-gpio-1.00.a";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	gpio-controller ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	interrupt-parent = <&microblaze_0_intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	interrupts = < 6 2 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	reg = < 0x40000000 0x10000 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	xlnx,all-inputs = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	xlnx,all-inputs-2 = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	xlnx,dout-default = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	xlnx,dout-default-2 = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	xlnx,gpio-width = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	xlnx,gpio2-width = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	xlnx,interrupt-present = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	xlnx,is-dual = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	xlnx,tri-default = <0xffffffff>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	xlnx,tri-default-2 = <0xffffffff>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) } ;