^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/gpio/gpio-mxs.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Freescale MXS GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Shawn Guo <shawnguo@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) The Freescale MXS GPIO controller is part of MXS PIN controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) The GPIOs are organized in port/bank, each port consists of 32 GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) As the GPIO controller is embedded in the PIN controller and all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) GPIO ports share the same IO space with PIN controller, the GPIO node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) will be represented as sub-nodes of MXS pinctrl node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - fsl,imx23-pinctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - fsl,imx28-pinctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) '#address-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) '#size-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "gpio@[0-9]+$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - fsl,imx23-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - fsl,imx28-gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) description: Should be the port interrupt shared by all 32 pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) interrupt-controller: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "#interrupt-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) const: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "#gpio-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) const: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) gpio-controller: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) - interrupt-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - "#interrupt-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) - "#gpio-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - gpio-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) - '#address-cells'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) - '#size-cells'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pinctrl@80018000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) compatible = "fsl,imx28-pinctrl";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) reg = <0x80018000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) gpio@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) compatible = "fsl,imx28-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) interrupts = <127>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) gpio@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) compatible = "fsl,imx28-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) interrupts = <126>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) gpio@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) compatible = "fsl,imx28-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) interrupts = <125>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) gpio@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) compatible = "fsl,imx28-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) interrupts = <124>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) gpio@4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) compatible = "fsl,imx28-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) reg = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) interrupts = <123>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };