Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Lantiq SoC External Bus memory mapped GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) By attaching hardware latches to the EBU it is possible to create output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) only gpios. This driver configures a special memory address, which when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) written to outputs 16 bit to the latches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) The node describing the memory mapped GPIOs needs to be a child of the node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) describing the "lantiq,localbus".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - compatible : Should be "lantiq,gpio-mm-lantiq"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - reg : Address and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #gpio-cells : Should be two.  The first cell is the pin number and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   the second cell is used to specify optional parameters (currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   unused).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - gpio-controller : Marks the device node as a gpio controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - lantiq,shadow : The default value that we shall assume as already set on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   shift register cascade.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) localbus@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	#address-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	#size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		1 0 0x4000000 0x4000010>; /* addsel1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	compatible = "lantiq,localbus", "simple-bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	gpio_mm0: gpio@4000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		compatible = "lantiq,gpio-mm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		reg = <1 0x0 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		lantiq,shadow = <0x77f>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }