^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Davinci/Keystone GPIO controller bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) "ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) 66AK2E SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reg: Physical base address of the controller and the size of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - gpio-controller : Marks the device node as a gpio controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #gpio-cells : Should be two.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - first cell is the pin number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - second cell is used to specify optional parameters (unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) supported at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - ti,ngpio: The number of GPIO pins supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) line to processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - clocks: Should contain the device's input clock, and should be defined as per
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) the appropriate clock bindings consumer usage in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Documentation/devicetree/bindings/clock/keystone-gate.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) for 66AK2HK/66AK2L/66AK2E SoCs or,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Documentation/devicetree/bindings/clock/ti,sci-clk.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) for 66AK2G SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - clock-names: Name should be "gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) Currently clock-names and clocks are needed for all keystone 2 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Davinci platforms do not have DT clocks as of now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) The GPIO controller also acts as an interrupt controller. It uses the default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) two cells specifier as described in Documentation/devicetree/bindings/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) interrupt-controller/interrupts.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) gpio: gpio@1e26000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) compatible = "ti,dm6441-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reg = <0x226000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) interrupt-parent = <&intc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 50 IRQ_TYPE_EDGE_BOTH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ti,ngpio = <144>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ti,davinci-gpio-unbanked = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) leds {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) compatible = "gpio-leds";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) led1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) label = "davinci:green:usr1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) led2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) label = "davinci:red:debug1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) Example for 66AK2G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) gpio0: gpio@2603000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) compatible = "ti,k2g-gpio", "ti,keystone-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) reg = <0x02603000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ti,ngpio = <144>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ti,davinci-gpio-unbanked = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) clocks = <&k2g_clks 0x001b 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clock-names = "gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) Example for 66AK2HK/66AK2L/66AK2E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) gpio0: gpio@260bf00 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) compatible = "ti,keystone-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg = <0x0260bf00 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* HW Interrupts mapped to GPIO pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) clocks = <&clkgpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) clock-names = "gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ti,ngpio = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ti,davinci-gpio-unbanked = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) Example for K3 AM654:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) wkup_gpio0: wkup_gpio0@42110000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) compatible = "ti,am654-gpio", "ti,keystone-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) reg = <0x42110000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) interrupt-parent = <&intr_wkup_gpio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) interrupts = <59 128>, <59 129>, <59 130>, <59 131>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #interrupt-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ti,ngpio = <56>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ti,davinci-gpio-unbanked = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) clocks = <&k3_clks 59 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) clock-names = "gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags