^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Cirrus Logic CLPS711X GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: Should be "cirrus,ep7209-gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: Physical base GPIO controller registers location and length.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) There should be two registers, first is DATA register, the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) is DIRECTION.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - gpio-controller: Marks the device node as a gpio controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - #gpio-cells: Should be two. The first cell is the pin number and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) the second cell is used to specify the gpio polarity:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 0 = active high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 1 = active low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Note: Each GPIO port should have an alias correctly numbered in "aliases"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) aliases {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) gpio0 = &porta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) porta: gpio@80000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) compatible = "cirrus,ep7312-gpio","cirrus,ep7209-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) reg = <0x80000000 0x1>, <0x80000040 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };