Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Altera GPIO controller bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)   - "altr,pio-1.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg: Physical base address and length of the controller's registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - #gpio-cells : Should be 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)   - The first cell is the gpio offset number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   - The second cell is reserved and is currently unused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - gpio-controller : Marks the device node as a GPIO controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupt-controller: Mark the device node as an interrupt controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - The first cell is the GPIO offset number within the GPIO controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - interrupts: Specify the interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - altr,interrupt-type: Specifies the interrupt trigger type the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   hardware is synthesized. This field is required if the Altera GPIO controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   used has IRQ enabled as the interrupt type is not software controlled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   but hardware synthesized. Required if GPIO is used as an interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   controller. The value is defined in <dt-bindings/interrupt-controller/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   Only the following flags are supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)     IRQ_TYPE_EDGE_RISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)     IRQ_TYPE_EDGE_FALLING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)     IRQ_TYPE_EDGE_BOTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     IRQ_TYPE_LEVEL_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - altr,ngpio: Width of the GPIO bank. This defines how many pins the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   specified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) gpio_altr: gpio@ff200000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	compatible = "altr,pio-1.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	reg = <0xff200000 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	interrupts = <0 45 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	altr,ngpio = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	#interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };