Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Altera Freeze Bridge Controller Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The Altera Freeze Bridge Controller manages one or more freeze bridges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) The controller can freeze/disable the bridges which prevents signal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) changes from passing through the bridge.  The controller can also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) unfreeze/enable the bridges which allows traffic to pass through the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) bridge normally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible		: Should contain "altr,freeze-bridge-controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - regs			: base address and size for freeze bridge module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	freeze-controller@100000450 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		compatible = "altr,freeze-bridge-controller";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		regs = <0x1000 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		bridge-enable = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	};