Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Spreadtrum DMA controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) This binding follows the generic DMA bindings defined in dma.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - compatible: Should be "sprd,sc9860-dma".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg: Should contain DMA registers location and length.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts: Should contain one interrupt shared by all channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - #dma-cells: must be <1>. Used to represent the number of integer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	cells in the dmas property of client device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #dma-channels : Number of DMA channels supported. Should be 32.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clock-names: Should contain the clock of the DMA controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - clocks: Should contain a clock specifier for each entry in clock-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Controller:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) apdma: dma-controller@20100000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	compatible = "sprd,sc9860-dma";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	reg = <0x20100000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	#dma-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	#dma-channels = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	clock-names = "enable";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	clocks = <&clk_ap_ahb_gates 5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Client:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) DMA clients connected to the Spreadtrum DMA controller must use the format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) described in the dma.txt file, using a two-cell specifier for each channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The two cells in order are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 1. A phandle pointing to the DMA controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 2. The slave id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) spi0: spi@70a00000{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	dma-names = "rx_chn", "tx_chn";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	dmas = <&apdma 11>, <&apdma 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };